now meets 1 mrad 1 mrad ! description ddcs bu-61582 space advanced communication engine (space) is a radiation hardened version of the bu- 61580 ace terminal. ddc is able to supply the bu-61582 with enhanced screening for space and other high reliability applications. the bu-61582 provides a complete integrated bc/rt/mt interface between a host processor and a mil- std-1553 bus. the bu-61582 pro- vides functional and software compat- ibility with the standard bu-61580 product and is packaged in the same 1.9-square-inch package footprint. as an option, ddc can supply the bu-61582 with space level screening. this entails enhancements in the areas of element evaluation and screening procedures for active and passive elements, as well as the man- ufacturing and screening processes used in producing the terminals. the bu-61582 integrates dual trans- ceiver, protocol, memory manage- ment and processor interface logic, and 16k words of ram in the choice of 70-pin dip or flat pack packages. transceiverless versions may be used with an external electrical or fiber optic transceiver. to minimize board space and glue logic, the space terminals provide ultimate flexibility in interfacing to a host processor and internal/external ram. space level mil-std-1553 bc/rt/mt advanced communication engine features ? radiation-hardened to 1 mrad ? fully integrated 1553 terminal ? flexible processor interface ? 16k x 16 internal ram ? automatic bc retries ? programmable bc gap times ? bc frame auto-repeat ? intelligent rt data buffering ? small ceramic package ? available to smd 5962-96887 transceiver a ch. a transceiver b ch. b dual encoder/decoder, multiprotocol and memory management rt address 16kx16 shared ram address bus processor and memory interface logic data bus d15-d0 a15-a0 data buffers address buffers processor data bus processor address bus miscellaneous incmd clk_in, tag_clk, mstclr,ssflag/ext_trg rtad4-rtad0, rtadp transparent/buffered, strbd, select, rd/wr, mem/reg, trigger_sel/memena-in, msb/lsb/dtgrt ioen, memena-out, readyd addr_lat/memoe, zero_wait/memwr, 8/16-bit/dtreq, polarity_sel/dtack int processor and memory control interrupt request figure 1. bu-61582 block diagram ace users guide also available bu-61582 ? 1995, 1999 data device corporation
2 bu-61582dx, 70-pin dip ceramic package mechanical outline qci testing mil-std-883, method 1018 mil-std-883, method 1010 condition c and mil-std-883, method 2012 mil-std-883, method 2012 mil-std-883, method 2023 mil-std-883, method 1015 mil-std-883, method 2020 condition a mil-h-38534 mil-std-883, method 2018 mil-std-883, method 2010 condition a mil-std-750, method 2072 and 2073 mil-std-883, method 2032 class s method moisture content limit of 5000 ppm extended temperature cycling: 20 cycles including radiographic (x-ray) testing radiographic (x-ray) analysis 100% non-destructive wirebond pull 320-hour burn-in particle impact noise detection (pnd) element evaluation: visual, electrical, wire bondability, 24-hour stabilization bake, 10 temperature cycles 5000 gs constant acceleration 240-hour powered burn-in and 1000-hour life test (burn-in and 1000-hour life test are only required for active components.) sem analysis for integrated circuits visual inspection: integrated circuits transistors & diodes passive components assembly & test element evaluation high reliability screening options 0.400 (10.16) 1.700 (43.18) index denotes pin 1 0.215 (5.46) max 1.900 max (48.26) 0.180 0.010 typ (4.57 0.25) 0.100 (2.54) 0.100 (2.54) typ 0.050 (1.27) typ 0.600 (15.24) 0.018 0.002 dia typ (0.46 0.05) 34 35 36 37 69 70 2 bottom view 1.900 (48.26) max side view immune 3.6 x 10 -5 errors/device-day, (let threshold of 59 mev/mg/cm 2 ) 1mrad bu-61582xx single event latchup single event upset total dose space series radiation specifications part number
3 70 36 35 1 1.000 (max) 1.900 max 0.018 0.002 pin 1 denoted by index mark 0.050 typ 34 eq. sp. @ 0.050 = 1.700 (tol. noncum) pin numbers are for ref. only 0.080 min 0.190 0.010 0.040 typ 0.050 min 0.012 max 1.024 max 1.38 0.02 0.065 (ref) 0.010 0.002 0.215 max index denotes pin 1 notes: 1. dimensions are in inches (millimeters). 2. package material: alumina (al 2 o 3 ). 3. lead material: kovar, plated by 150 m minimum nickel, plated by 50 m minimum gold. bu-61582gx, 70-pin gull lead ceramic package mechanical outline 70 36 35 1 0.015 0.002 typ (0.381 0.051) 1.900 max (48.26) 34 eq sp @ 0.050 = 1.700 (43.18) (1.27) tol noncum 0.050 typ (1.27) 0.400 min typ (10.16) index denotes pin 1 1.000 max (25.4) 0.215 (5.46) max 0.010 0.002 typ (0.254 0.051) 0.070 0.010 (1.78) pin numbers for ref only top view side view notes: 1. dimensions are in inches (millimeters). 2. package material: alumina (al 2 o 3 ). 3. lead material: kovar, plated by 150 m minimum nickel, plated by 50 m minimum gold. bu-61582fx, 70-pin flat pack ceramic package mechanical outline
4 ordering information bu-61582 xx-xxxx supplemental process requirements: s = pre-cap source inspection l = pull test q = pull test and pre-cap inspection k = one lot date code w = one lot date code and precap source y = one lot date code and 100% pull test z = one lot date code, precap source and 100% pull test blank = none of the above other criteria: 0 = no x ray 1 = x ray process requirements: 0 = standard ddc processing, no burn-in (see page xiii.) 1 = mil-prf-38534 compliant* 2 = b** 3 = mil-prf-38534 compliant with pind testing* 4 = mil-prf-38534 compliant with solder dip* 5 = mil-prf-38534 compliant with pind testing and solder dip* 6 = b** with pind testing 7 = b** with solder dip 8 = b** with pind testing and solder dip 9 = standard ddc processing with solder dip, no burn-in (see page xiii.) temperature grade/data requirements: 1 = -55c to +125c 2 = -40c to +85c 3 = 0c to +70c 4 = -55c to +125c with variables test data 5 = -40c to +85c with variables test data 8 = 0c to +70c with variables test data voltage transceiver option: 0 = no transceiver 1 = +5/-15 v 2 = +5/-12 v package: d = dip f = flat pack g = gull leads (above process requirements must include solder dip.) product type: 61582 = 70-pin bc/rt/mt with 16k x 16 internal ram 61583 = 70-pin bc/rt/mt with 16k x 16 internal ram and with rt address latch *mil-prf-38534 compliant products include 320 hours of burn-in and 100% non-destruct pull-test. supplemental process requirements must be an l or a q for mil-prf-38534 compliant parts. **standard ddc processing with burn-in and full temperature test see table on page xiii.
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8 c-abr-08/98-0 ilc data device corporation registered to iso 9001 file no. a5976 printed in the u.s.a. the information in this data sheet is believed to be accurate; however, no responsibility is assumed by data device corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. specifications are subject to change without notice. 105 wilbur place, bohemia, new york 11716-2482 for technical support - 1-800-ddc-5757 ext. 7257 or 7381 headquarters - tel: (631) 567-5600 ext. 7257 or 7381, fax: (631) 567-7358 southeast - tel: (703) 450-7900, fax: (703) 450-6610 west coast - tel: (714) 895-9777, fax: (714) 895-4988 europe - tel: +44-(0)1635-811140, fax: +44-(0)1635-32264 asia/pacific - tel: +81-(0)3-3814-7688, fax: +81-(0)3-3814-7689 world wide web - http://www.ddc-web.com
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